{"updated":"2025-01-20T11:53:13.539385+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00161539","sets":["6504:8672:8731"]},"path":["8731"],"owner":"6748","recid":"161539","title":["Verilog HDLで記述するRISC-V命令セットのアウトオブオーダ実行プロセッサ"],"pubdate":{"attribute_name":"公開日","attribute_value":"2016-03-10"},"_buckets":{"deposit":"330f88b2-de52-451f-bb39-70d88dac1c79"},"_deposit":{"id":"161539","pid":{"type":"depid","value":"161539","revision_id":0},"owners":[6748],"status":"published","created_by":6748},"item_title":"Verilog HDLで記述するRISC-V命令セットのアウトオブオーダ実行プロセッサ","author_link":["314127","314126","314125"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Verilog HDLで記述するRISC-V命令セットのアウトオブオーダ実行プロセッサ"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"コンピュータシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"22","publish_date":"2016-03-10","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東工大"},{"subitem_text_value":"東工大"},{"subitem_text_value":"東工大"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/161539/files/IPSJ-Z78-6G-07.pdf","label":"IPSJ-Z78-6G-07.pdf"},"date":[{"dateType":"Available","dateValue":"2016-05-18"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-Z78-6G-07.pdf","filesize":[{"value":"133.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"5fbbf5ed-f92b-4a54-ae7a-349db9ff55d3","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2016 by the Information Processing Society of Japan"}]},"item_22_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"藤浪, 将"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"眞下, 達"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"吉瀬, 謙二"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"教育，研究用プロセッサは中身がわかりやすいことが重要である．自由に使えるオープンな命令セットとして，RISC-Vがある．しかし，RISC-Vのインオーダ実行プロセッサであるRocket Coreは教育用でありながら，Chiselといわれる独自の言語で記述されており，可読性が低く，改良しにくいという欠点がある．一方，オープンソースのアウトオブオーダ実行プロセッサはまだ数が少なく，教育，研究ともに需要があると考えられる．そこで我々は，FPGA上で動作する，RISC-Vを用いたアウトオブオーダ実行のプロセッサを一般的なVerilog HDLで開発する．","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"118","bibliographic_titles":[{"bibliographic_title":"第78回全国大会講演論文集"}],"bibliographicPageStart":"117","bibliographicIssueDates":{"bibliographicIssueDate":"2016-03-10","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2016"}]},"relation_version_is_last":true,"weko_creator_id":"6748"},"created":"2025-01-19T00:34:16.754132+00:00","id":161539,"links":{}}