{"created":"2025-01-18T22:49:19.704887+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00015909","sets":["581:892:894"]},"path":["894"],"owner":"11","recid":"15909","title":["論理シミュレーションマシンのアーキテクチャ"],"pubdate":{"attribute_name":"公開日","attribute_value":"1984-09-15"},"_buckets":{"deposit":"aab2547a-622d-449e-85bd-c2a561daee00"},"_deposit":{"id":"15909","pid":{"type":"depid","value":"15909","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"論理シミュレーションマシンのアーキテクチャ","author_link":["361331","361330","361333","361332","361334","361335"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"論理シミュレーションマシンのアーキテクチャ"},{"subitem_title":"Architecture of the High Speed Logic Simulation Machine","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"論文（論文賞受賞）","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"1984-09-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"日本電気（株）C&Cシステム研究所"},{"subitem_text_value":"日本電気（株）C&Cシステム研究所"},{"subitem_text_value":"日本電気（株）コンピュータ技術本部"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"C&C Systems Research Laboratories, Nippon Electric Co., Ltd","subitem_text_language":"en"},{"subitem_text_value":"C&C Systems Research Laboratories, Nippon Electric Co., Ltd","subitem_text_language":"en"},{"subitem_text_value":"Computer Engineering Division, Nippon Electric Co., Ltd","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/15909/files/IPSJ-JNL2505020.pdf","label":"IPSJ-JNL2505020"},"date":[{"dateType":"Available","dateValue":"1986-09-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL2505020.pdf","filesize":[{"value":"671.9 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"6e36dae2-dfb0-4083-a94b-bb4377e487b8","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1984 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小池, 誠彦"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"大森, 健児"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"佐々木, 徹"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Nobuhiko, Koike","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kenji, Ohmori","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tohru, Sasaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本論文はCPU マイクロプログラムメモリ キャッシュメモリ メインメモリを含めた大型計算機の装置全体の論理シミュレーションを高速に実行する専用マシンのアーキテクチャについてその特徴および設計思想に重点をおいて論じている.専用マシンは 数十ゲートで構成される論理的にまとまりのある\"ブロック\"を単位として用いる.専用マシンのアーキテクチャは高速化および大容量化を実現するために ?32台のマルチプロセッサ構成により負荷分散を図る ?各プロセッサをプログラム制御でなくすべてハードウェアにより実現しパイプライン処理を行う ?論理演算を書換え可能なメモリを用いてハードウェアで実現する 等の特徴を備えている.その結果 32台の専用プロセッサを用いることにより150万ゲートからなる装置を毎秒2.6億ゲートシミュレーションの速度で処理することが可能となる.これは従来のソフトウェアによるシミュレーションの数千から数万倍の処理スピードをもち 大型計算機等の大規模な装置の論理シミュレーションにも十分な性能が得られる.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"872","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"864","bibliographicIssueDates":{"bibliographicIssueDate":"1984-09-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"5","bibliographicVolumeNumber":"25"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":15909,"updated":"2025-01-20T06:33:55.769448+00:00","links":{}}