{"id":147518,"updated":"2025-01-20T12:54:46.441469+00:00","links":{},"created":"2025-01-19T00:22:37.319300+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00147518","sets":["1164:1579:8444:8445"]},"path":["8445"],"owner":"11","recid":"147518","title":["動的遅延ばらつきに対する適応性を考慮したフロアプラン指向高位合成手法の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2016-01-12"},"_buckets":{"deposit":"559e7b5b-57b0-402a-aa69-63cb44cf1fde"},"_deposit":{"id":"147518","pid":{"type":"depid","value":"147518","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"動的遅延ばらつきに対する適応性を考慮したフロアプラン指向高位合成手法の検討","author_link":["234971","234973","234972","234969","234970","234968"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"動的遅延ばらつきに対する適応性を考慮したフロアプラン指向高位合成手法の検討"},{"subitem_title":"A floorplan-driven high-level synthesis algorithm resilient to dynamic delay variations","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"高位設計","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2016-01-12","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工・情報通信専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工・情報通信専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工・情報通信専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Dept. of Computer Science and Communications Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Communications Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Communications Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/147518/files/IPSJ-ARC16218036.pdf","label":"IPSJ-ARC16218036.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC16218036.pdf","filesize":[{"value":"540.1 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"d7b89f62-93eb-47ae-97e8-ee5857753a7d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2016 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"井川, 昂輝"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"柳澤, 政生"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"戸川, 望"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Koki, Igawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masao, Yanagisawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nozomu, Togawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では，動的遅延ばらつき対する適応性を考慮した高位合成手法を提案する．製造ばらつきに対して提案されたマルチシナリオ高位合成は，動的な遅延ばらつきに対しても適用可能である．回路の遅延変動に応じて動作シナリオを切り替えることで，遅延ばらつきに対する柔軟な動作が可能である．分散レジスタ/コントローラアーキテクチャモデルを対象としているため，高位合成段階で適切にフロアプランを扱える．加えて，シナリオ切り替えのためのタイミング違反予測手法の導入を検討する．タイミング違反予測手法として，クリティカルパスのレプリカ回路およびタイミング違反予測フリップフロップに注目し，それぞれの分散レジスタ/コントローラアーキテクチヤモデルヘの適用方法を提案する．2 つの提案手法はワーストケース設計と比較し，面積オーバーヘッドを考慮しても，それぞれ最大 21.4％，25.0％の平均レイテンシの削減を確認した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Recently, we have proposed a multi-scenario high-level synthesis algorithm targeting static process variations. The algorithm can be applied to static delay variations by switching the pre-defined behavior scenarios before the circuit starts to operate. The proposed algorithm can be applied to dynamic delay variations if we can effectively embed timing-violation prediction scheme. In this paper, we propose a floorplan-driven high-level synthesis algorithm resilient to dynamic delay variations. In our algorithm, we adopt distributed register/controller architectures to incorporate floorplanning into high-level synthesis efficiently. Moreover, we discuss timing-violation prediction schemes for switching behavior scenarios. Particularly, we focus on critical path replica and timing-error predictable flip-flops. Experimental results demonstrate the efficiency of our proposed timing-violation prediction schemes, which can reduce the average latency by up to 25.0% compared to the previous methods.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2016-01-12","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"36","bibliographicVolumeNumber":"2016-ARC-218"}]},"relation_version_is_last":true,"weko_creator_id":"11"}}