{"created":"2025-01-19T00:22:18.199232+00:00","updated":"2025-01-20T17:43:57.721617+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00147027","sets":["1164:2036:8446:8447"]},"path":["8447"],"owner":"11","recid":"147027","title":["再構成可能論理回路の設計法と各種方式の比較"],"pubdate":{"attribute_name":"公開日","attribute_value":"2016-01-12"},"_buckets":{"deposit":"f6f0d514-a0d8-4750-8060-4920d8767a38"},"_deposit":{"id":"147027","pid":{"type":"depid","value":"147027","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"再構成可能論理回路の設計法と各種方式の比較","author_link":["232028","232033","232030","232031","232029","232034","232032","232026","232027","232035"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"再構成可能論理回路の設計法と各種方式の比較"},{"subitem_title":"Circuit Design of Reconfigurable Logic and Comparison of the Methods","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"FPGAアーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2016-01-12","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"湘南工科大学大学院電気情報工学専攻"},{"subitem_text_value":"湘南工科大学大学院電気情報工学専攻"},{"subitem_text_value":"湘南工科大学大学院電気情報工学専攻"},{"subitem_text_value":"湘南工科大学大学院電気情報工学専攻"},{"subitem_text_value":"湘南工科大学大学院電気情報工学専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Shonan Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Shonan Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Shonan Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Shonan Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Shonan Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/147027/files/IPSJ-SLDM16174001.pdf","label":"IPSJ-SLDM16174001.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM16174001.pdf","filesize":[{"value":"753.4 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"f64dcf54-18a5-4d16-96b7-751d83a6540b","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2016 by the Institute of Electronics, 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Kobayashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yasuyuki, Miura","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"再構成可能な論理回路を実現するデバイスとして，ダブルゲート型トランジスタ，CNT 型トランジスタが注目されている．本研究では，ダブルゲート型トランジスタを用いて過去に前例のなかった 2 種類の制御信号を用いた回路を設計し，パターン設計を行った．さらに比較の観点からコストや歩留まり，構成素子数についての検討も行った．同様に CNT 型トランジスタで構成された回路についても同様の検討を行い，それぞれのメリット，デメリットについての考察を行う．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"One of the most promising candidates for reconfigurable logic in Double Gate MOSFET and CNTFET. In the paper circuit design of reconfigurable dynamic and static logic based on double gate MOSFETs has been newly described. The number of transistor and pattern area have been estimated.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2016-01-12","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2016-SLDM-174"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":147027,"links":{}}