{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00146160","sets":["1164:2036:7856:8381"]},"path":["8381"],"owner":"11","recid":"146160","title":["アナログバウンダリスキャンを用いた三次元積層後のTSV抵抗の精密計測法の実装について"],"pubdate":{"attribute_name":"公開日","attribute_value":"2015-11-24"},"_buckets":{"deposit":"5c72f53b-bc9e-4560-944c-4528fecd95c8"},"_deposit":{"id":"146160","pid":{"type":"depid","value":"146160","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"アナログバウンダリスキャンを用いた三次元積層後のTSV抵抗の精密計測法の実装について","author_link":["227178","227181","227184","227183","227177","227185","227179","227176","227182","227180"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"アナログバウンダリスキャンを用いた三次元積層後のTSV抵抗の精密計測法の実装について"},{"subitem_title":"Implementation of Precision Resistance Measurement of TSVs Using Analog Boundary Scan","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"予測と測定","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2015-11-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"愛媛大学大学院理工学研究科"},{"subitem_text_value":"愛媛大学大学院理工学研究科"},{"subitem_text_value":"愛媛大学大学院理工学研究科／富士通株式会社"},{"subitem_text_value":"愛媛大学大学院理工学研究科"},{"subitem_text_value":"愛媛大学大学院理工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Engineering, Ehime University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Engineering, Ehime University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Engineering, Ehime University / FUJITSU LTD.","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Engineering, Ehime University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Engineering, Ehime University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/146160/files/IPSJ-SLDM15173034.pdf","label":"IPSJ-SLDM15173034.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM15173034.pdf","filesize":[{"value":"2.0 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"cc90dfaa-a6d8-44ef-a28e-5fea399ad216","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2015 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"王, 森レイ"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"香川, 敬祐"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"亀山, 修一"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"樋上, 喜信"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"高橋, 寛"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Senling, Wang","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Keisuke, Kagawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shuichi, Kameyama","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshinobu, Higami","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroshi, Takahashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，半導体デバイスの高性能化・多機能化を向上させるために，Through Silicon Via(TSV) を利用した三次元積層技術の実用化が進められている．一方，製造不良による TSV での欠陥 （ボイド，ピンホールなど） は積層したチップ間の接続障害の重要な原因のひとつである．製品の歩留まり改善及び品質向上のためには積層後のチップ間の TSV 抵抗を高精度で計測することは非常に効果的な手段となる．文献 [4] ではアナログバウンダリスキャン技術を利用した TSV 抵抗の精密計測法を提案した．本研究ではアナログバウンダリスキヤンによる TSV 抵抗計測回路の回路設計及び実装設計を行い，提案した TSV 抵抗精密計測法の実現性を検証した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Through Silicon Vias (TSV) based Three-Dimensional Stacking technology provides a solution to enable the continuing development of high-performance/multifunction ICs. Manufacturing defects such as Voids/Pinholes within the TSV have emerged as a big concern that they may cause interconnect failure between the stacked dies in 3D-IC. Measuring/Monitoring the resistance of TSVs is necessary for improving the yield and quality of 3D-IC. In [4], authors have introduced a novel method to measure the resistance of high density post-bond TSVs with high precision by using Analog Boundary-Scan technology. In this paper, we design and implement the proposed method on a chip and evaluate its area overhead.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2015-11-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"34","bibliographicVolumeNumber":"2015-SLDM-173"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":146160,"updated":"2025-01-20T18:05:26.235628+00:00","links":{},"created":"2025-01-19T00:21:39.433183+00:00"}