{"updated":"2025-01-20T19:17:11.722956+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00141660","sets":["1164:2036:7856:8244"]},"path":["8244"],"owner":"11","recid":"141660","title":["クロックグリッチに基づく故障解析に耐性を持つAES暗号回路"],"pubdate":{"attribute_name":"公開日","attribute_value":"2015-05-07"},"_buckets":{"deposit":"474f923e-7447-45a6-acdb-1e48abf78c4f"},"_deposit":{"id":"141660","pid":{"type":"depid","value":"141660","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"クロックグリッチに基づく故障解析に耐性を持つAES暗号回路","author_link":["207515","207509","207511","207512","207514","207510","207508","207513"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"クロックグリッチに基づく故障解析に耐性を持つAES暗号回路"},{"subitem_title":"AES Encryption Circuit against Clock Glitch based Fault Analysis","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"解析問題","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2015-05-07","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学大学院基幹理工学研究科"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Grad. of Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Grad. of Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Grad. of Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Grad. of Science and Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/141660/files/IPSJ-SLDM15171010.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM15171010.pdf","filesize":[{"value":"930.4 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"04432269-81d6-44e8-8cdf-d1b1c9eca964","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2015 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"平野, 大輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"史, 又華"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"戸川, 望"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"柳澤, 政生"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Daisuke, Hirano","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Youhua, SHI","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nozomu, Togawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masao, Yanagisawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，暗号回路への攻撃手法として，故障解析が脅威となっている．回路への故障の発生方法には，レーザー照射や電圧変動，クロックグリッチなどの方法があるが，実装や制御の容易性からクロックグリッチが注目されている．対策手法として，回路を三重化して比較する空間冗長化手法や，同じ処理を 2 回行って比較する時間冗長化手法が存在する．しかし，これらの手法は面積オーバーヘッド或いは時間オーバーヘッドが大きいという問題点がある．本稿では，故障解析の誘因となるクロックグリッチを高速に検出可能で，面積オーバーヘッドを 4.9％ に抑えた AES 暗号回路を提案する．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Recently, fault analysis has attracted a lot of attentions as a new kind of side channel attack methods, in which malicious faults are generally injected by attackers through clock glitch generation, voltage change, or laser manipulation during the execution of a crypto circuit. As existing countermeasures against fault analysis, area-redundant and time-redundant methods have been proposed. However they will cause large area overhead or time overhead. Therefore, in this paper, we proposed an AES circuit design that can detect timing faults caused by malicious clock glitches. Experimental results show that the proposed method can detect 100% timing faults at only 4.9% post-layout area overhead.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"5","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2015-05-07","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"10","bibliographicVolumeNumber":"2015-SLDM-171"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-19T00:19:12.825698+00:00","id":141660,"links":{}}