{"created":"2025-01-19T00:06:34.147625+00:00","updated":"2025-01-21T01:31:27.475091+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00126993","sets":["6504:8067:8076"]},"path":["8076"],"owner":"1","recid":"126993","title":["HDLによるコ・デザイン環境の構築"],"pubdate":{"attribute_name":"公開日","attribute_value":"1994-09-20"},"_buckets":{"deposit":"757337f8-c2aa-4d97-b5ac-dc98d28ba2bc"},"_deposit":{"id":"126993","pid":{"type":"depid","value":"126993","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"HDLによるコ・デザイン環境の構築","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"HDLによるコ・デザイン環境の構築"},{"subitem_title":"The Development of Co-design Environment based on HDL","subitem_title_language":"en"}]},"item_type_id":"22","publish_date":"1994-09-20","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"横河電機(株)EDA開発センター"},{"subitem_text_value":"横河電機(株)EDA開発センター"},{"subitem_text_value":"横河電機(株)EDA開発センター"},{"subitem_text_value":"横河電機(株)EDA開発センター"},{"subitem_text_value":"横河電機(株)EDA開発センター"}]},"item_22_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"EDA Development Center, Yokogawa Electric Corporation","subitem_text_language":"en"},{"subitem_text_value":"EDA Development Center, Yokogawa Electric Corporation","subitem_text_language":"en"},{"subitem_text_value":"EDA Development Center, Yokogawa Electric Corporation","subitem_text_language":"en"},{"subitem_text_value":"EDA Development Center, Yokogawa Electric Corporation","subitem_text_language":"en"},{"subitem_text_value":"EDA Development Center, Yokogawa Electric Corporation","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/126993/files/KJ00001340494.pdf"},"date":[{"dateType":"Available","dateValue":"1994-09-20"}],"format":"application/pdf","filename":"KJ00001340494.pdf","filesize":[{"value":"171.6 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"b961be67-6326-4488-9cd1-ae812a39d5a3","displaytype":"detail","licensetype":"license_note"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"HDLによるトップダウン設計手法の普及により、複雑なハードウェアを短期間で容易に構築できるようになってきた。一方、ソフトウェアを含めたシステム検証は、依然として、ハードウェア構築後に行なわれている。今回我々は、汎用Verilog-HDLシミュレータ上で動作する、ハード/ソフトのコ・デザイン環境(CEEDS-ICE)を構築した。本環境は、HDLで記述されたCPUモデル及び仮想ICE(In-Circuit Emulator)機能と、C言語で記述されたグラフィカル・ツール等により構成される。本環境により、実システム構築前に、システムパフォーマンス、アルゴリズム、ハード/ソフトのトレードオフなどが容易に検証できるようになった。本稿では、CEEDS-ICEの構成、特徴、適用事例について述べる。","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"84","bibliographic_titles":[{"bibliographic_title":"全国大会講演論文集"}],"bibliographicPageStart":"83","bibliographicIssueDates":{"bibliographicIssueDate":"1994-09-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"ハードウェア","bibliographicVolumeNumber":"第49回"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":126993,"links":{}}