{"updated":"2025-01-21T02:23:52.227645+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00124809","sets":["6504:8043:8053"]},"path":["8053"],"owner":"1","recid":"124809","title":["マイクロプロセッサrj406のアーキテクチャと評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"1993-09-27"},"_buckets":{"deposit":"9e601fb7-a8b8-4e33-a166-975359226227"},"_deposit":{"id":"124809","pid":{"type":"depid","value":"124809","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"マイクロプロセッサrj406のアーキテクチャと評価","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"マイクロプロセッサrj406のアーキテクチャと評価"},{"subitem_title":"Architecture and evaluation of microprocessor rj406","subitem_title_language":"en"}]},"item_type_id":"22","publish_date":"1993-09-27","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学"},{"subitem_text_value":"電気通信大学"},{"subitem_text_value":"電気通信大学"},{"subitem_text_value":"電気通信大学"},{"subitem_text_value":"電気通信大学"},{"subitem_text_value":"電気通信大学"}]},"item_22_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"},{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"},{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"},{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"},{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"},{"subitem_text_value":"University of Electric Communications","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/124809/files/KJ00001339314.pdf"},"date":[{"dateType":"Available","dateValue":"1993-09-27"}],"format":"application/pdf","filename":"KJ00001339314.pdf","filesize":[{"value":"146.9 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"14978ff3-9bea-4d8a-a0b1-088b2d8d4af8","displaytype":"detail","licensetype":"license_note"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"rj406[1]は限られたチップ面積で可能な限り大きな処理能力を実現することを目指して設計された32ビットRISCマイクロプロセッサである。本稿ではrj406の命令セット、割り込み機能、コプロセッサ命令について述べ、シミュレーションの結果をもとに評価する。","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"全国大会講演論文集"}],"bibliographicPageStart":"5","bibliographicIssueDates":{"bibliographicIssueDate":"1993-09-27","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"ハードウェア","bibliographicVolumeNumber":"第47回"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-19T00:04:41.090030+00:00","id":124809,"links":{}}