{"updated":"2025-01-21T03:12:31.341828+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00122812","sets":["6504:8020:8030"]},"path":["8030"],"owner":"1","recid":"122812","title":["資源共有型並列計算機\"砂丘\"のアクセス競合緩和法 : そのアーキテクチャについて"],"pubdate":{"attribute_name":"公開日","attribute_value":"1992-09-28"},"_buckets":{"deposit":"ae6421ab-1613-4d9d-933c-ae0f87233d2c"},"_deposit":{"id":"122812","pid":{"type":"depid","value":"122812","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"資源共有型並列計算機\"砂丘\"のアクセス競合緩和法 : そのアーキテクチャについて","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"資源共有型並列計算機\"砂丘\"のアクセス競合緩和法 : そのアーキテクチャについて"},{"subitem_title":"How to Decrease Memory Access contention in The Tightly-Cuppled MIMD Type Parallel Processor System \" SAKYU \" (Architecture)","subitem_title_language":"en"}]},"item_type_id":"22","publish_date":"1992-09-28","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"鳥取大学工学部"},{"subitem_text_value":"鳥取大学工学部"},{"subitem_text_value":"米子工業高等専門学校"},{"subitem_text_value":"鳥取大学工学部"},{"subitem_text_value":"鳥取大学工学部"}]},"item_22_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Tottori University","subitem_text_language":"en"},{"subitem_text_value":"Tottori University","subitem_text_language":"en"},{"subitem_text_value":"Yonago National College of Technology","subitem_text_language":"en"},{"subitem_text_value":"Tottori University","subitem_text_language":"en"},{"subitem_text_value":"Tottori University","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/122812/files/KJ00001344532.pdf"},"date":[{"dateType":"Available","dateValue":"1992-09-28"}],"format":"application/pdf","filename":"KJ00001344532.pdf","filesize":[{"value":"159.5 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"5126ba9f-5703-4fb4-8234-45dbd161d76f","displaytype":"detail","licensetype":"license_note"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"我々の研究室では,共有メモリ型マルチプロセッサシステムのプロトタイプとして,プロセッサユニット(PU)を64台実装した並列計算機\"砂丘\"を製作した.このタイプの計算機では,アクセス競合によるオーバーヘッドはシステムが大規模になるほど増え,PUの台数に比例した処理速度の向上が得られなくなる.アクセス競合を回避するために,共有メモリの階層化,インターリーブ方式,多重ポート化を行った.さらにメインメモリは,マルチリードワンライト方式を採用し,リードアクセスバスとライトアクセスバスを分離した.本報告では,並列計算機\"砂丘\"のシステム構成について述べる.","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"90","bibliographic_titles":[{"bibliographic_title":"全国大会講演論文集"}],"bibliographicPageStart":"89","bibliographicIssueDates":{"bibliographicIssueDate":"1992-09-28","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"ハードウェア","bibliographicVolumeNumber":"第45回"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-19T00:02:58.587471+00:00","id":122812,"links":{}}