{"created":"2025-01-18T22:46:32.594936+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00012092","sets":["581:677:688"]},"path":["688"],"owner":"11","recid":"12092","title":["非数値計算応用向けスレッド・レベル並列処理マルチプロセッサ・アーキテクチャSKY"],"pubdate":{"attribute_name":"公開日","attribute_value":"2001-02-15"},"_buckets":{"deposit":"5fb126f6-21d8-4c92-9e75-72d6a98cd854"},"_deposit":{"id":"12092","pid":{"type":"depid","value":"12092","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"非数値計算応用向けスレッド・レベル並列処理マルチプロセッサ・アーキテクチャSKY","author_link":["361756","361753","361749","361751","361752","361755","361747","361748","361754","361750"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"非数値計算応用向けスレッド・レベル並列処理マルチプロセッサ・アーキテクチャSKY"},{"subitem_title":"A Multiprocessor Architecture SKY that Exploits Thread-Level Parallelism in Non-Numerical Applications","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"論文（論文賞受賞）","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"2001-02-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋大学大学院工学研究科"},{"subitem_text_value":"名古屋大学大学院工学研究科／現在，岐阜県製品技術研究所"},{"subitem_text_value":"名古屋大学大学院工学研究科／現在，三菱重工業株式会社"},{"subitem_text_value":"名古屋大学大学院工学研究科"},{"subitem_text_value":"名古屋大学大学院工学研究科"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Engineering, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Nagoya University/Presently with Gifu Prefectural Research Institute of Industrial Products","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Nagoya University/Presently with Mitsubishi Heavy Industries Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Nagoya University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/12092/files/IPSJ-JNL4202026.pdf","label":"IPSJ-JNL4202026"},"date":[{"dateType":"Available","dateValue":"2003-02-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL4202026.pdf","filesize":[{"value":"1.9 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"cbe52cc8-4c83-4875-81d9-1605ff5717c7","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2001 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小林, 良太郎"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小川, 行宏"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"岩田, 充晃"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"安藤, 秀樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"島田, 俊夫"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Ryotaro, Kobayashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yukihiro, Ogawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Mitsuaki, Iwata","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hideki, Ando","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Toshio, Shimada","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年のマイクロプロセッサは，スーパスカラ・アーキテクチャにより，より多くの命令レベル並列（ILP: Instruction-Level Parallelism）をプログラムより引き出し高性能化を図ってきた．しかし，この方法は，スーパスカラ・プロセッサが引き出すことのできる命令レベル並列の限界や，ハードウェアの複雑さの増加により，限界が見え始めてきた．これを解決する1つの方法は，ILPに加えスレッド・レベル並列（TLP: Thread-Level Parallelism）を利用することである．本論文では，レジスタ値の同期/通信機能を備え，複数のスレッドを並列に実行するSKYと呼ぶマルチプロセッサ・アーキテクチャを提案する．SKYは，非数値計算応用で高い性能を達成することを目的としている．このためには，細粒度のTLPを低オーバヘッドで利用することが要求され，SKYでは，命令ウィンドウ・ベースの同期/通信機構と呼ぶ機構を新たに導入した．この機構は，従来のレジスタ・ベースの同期/通信機構と異なり，受信待ちの命令に後続する命令の実行を可能にするノンブロッキング同期を実現している．これにより，TLPとILPを同時に最大限利用することを可能とする．SPECint95を用いた評価により，8命令発行の2つのスーパスカラ・プロセッサにより構成したSKYは，16命令発行のスーパスカラ・プロセッサに対して，最大46.1%，平均21.8%の高い性能を達成できることを確認した．","subitem_description_type":"Other"}]},"item_2_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Current microprocessors have improved performance by exploiting more amount of instruction-level parallelism (ILP) from a program through superscalar architectures.This approach, however,is reaching its limit because of the limited ILP available to superscalar processors and the growth of their hardware complexity.Another approach that solves those problems is to exploit thread-level parallelism (TLP) in addition to ILP.This paper proposes a multiprocessor architecture, called SKY,which executes multiple threads in parallel with a register-value communication and synchronization mechanism.The objective of SKY is to achieve high performance in non-numerical applications.For this purpose, it is required to exploit fine-grain TLP with low overhead.To meet this requirement,SKY introduces an instruction-window-based communication and synchronization mechanism.This mechanism allows subsequent instructions to waiting instructions for receiving registers to be executed unlike previously proposed register-based mechanisms.This capability enables fully exploiting both TLP and ILP.The evaluation results show that SKY with two eight-issue superscalar processors achieves a speedup of up to 46.1% or an average of 21.8% over a 16-issue superscalar processor.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"366","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"349","bibliographicIssueDates":{"bibliographicIssueDate":"2001-02-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"42"}]},"relation_version_is_last":true,"item_2_alternative_title_2":{"attribute_name":"その他タイトル","attribute_value_mlt":[{"subitem_alternative_title":"マルチプロセッサアーキテクチャ"}]},"weko_creator_id":"11"},"id":12092,"updated":"2025-01-20T06:32:03.597603+00:00","links":{}}