{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00117898","sets":["6504:7962:7969"]},"path":["7969"],"owner":"1","recid":"117898","title":["時間協調を含むシーケンス制御回路の設計検証システム(1) : システム構成"],"pubdate":{"attribute_name":"公開日","attribute_value":"1989-10-16"},"_buckets":{"deposit":"34cf6a02-2a03-4d5a-b869-38626f623a97"},"_deposit":{"id":"117898","pid":{"type":"depid","value":"117898","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"時間協調を含むシーケンス制御回路の設計検証システム(1) : システム構成","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"時間協調を含むシーケンス制御回路の設計検証システム(1) : システム構成"},{"subitem_title":"A Design Verification System for Sequential Control Circuits No.1","subitem_title_language":"en"}]},"item_type_id":"22","publish_date":"1989-10-16","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京電力"},{"subitem_text_value":"東京電力"},{"subitem_text_value":"日立製作所"},{"subitem_text_value":"日立製作所"},{"subitem_text_value":"日立製作所"},{"subitem_text_value":"日立製作所"},{"subitem_text_value":"日立製作所"}]},"item_22_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"TEPCO","subitem_text_language":"en"},{"subitem_text_value":"TEPCO","subitem_text_language":"en"},{"subitem_text_value":"Hitachi Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi Ltd.","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/117898/files/KJ00003118234.pdf"},"date":[{"dateType":"Available","dateValue":"1989-10-16"}],"format":"application/pdf","filename":"KJ00003118234.pdf","filesize":[{"value":"112.3 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"558d0b11-21e0-42f6-a414-de48906c5bcb","displaytype":"detail","licensetype":"license_note"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"各種の設計問題において、設計された結果が与えられた設計仕様を満たしているか否かの検証は不可欠である。前々回の報告では、時間変化情報を含まない変電所の制御保護装置の設計検証を対象として、定理証明法を利用した設計検証システムについて報告した。今回、対象として高速多相再閉路回路の設計を取り上げ、定理証明法による時間協調を含むシーケンス制御回路の設計検証システムを開発した。以下では、設計検証システムの構成を中心に報告する。","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographic_titles":[{"bibliographic_title":"全国大会講演論文集"}],"bibliographicPageStart":"1688","bibliographicIssueDates":{"bibliographicIssueDate":"1989-10-16","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"ハードウェア","bibliographicVolumeNumber":"第39回"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":117898,"updated":"2025-01-21T05:10:28.032356+00:00","links":{},"created":"2025-01-18T23:58:46.365725+00:00"}