{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00107137","sets":["1164:2036:7423:7746"]},"path":["7746"],"owner":"11","recid":"107137","title":["20-nm CMOSによる 1-tap DFE付56Gbpsデータ受信器"],"pubdate":{"attribute_name":"公開日","attribute_value":"2014-11-19"},"_buckets":{"deposit":"0a9294c0-1e1a-489d-8586-13127fef0ef1"},"_deposit":{"id":"107137","pid":{"type":"depid","value":"107137","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"20-nm CMOSによる 1-tap DFE付56Gbpsデータ受信器","author_link":["15751","15762","15764","15757","15759","15753","15761","15756","15763","15754","15760","15758","15755","15752"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"20-nm CMOSによる 1-tap DFE付56Gbpsデータ受信器"},{"subitem_title":"A 56-Gb/s Receiver Front-End with a CTLE and 1-Tap DFE in 20-nm CMOS","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"インターコネクト技術, 招待講演","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2014-11-19","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"},{"subitem_text_value":"株式会社富士通研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Laboratories Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/107137/files/IPSJ-SLDM14168038.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM14168038.pdf","filesize":[{"value":"1.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"12bbd9b7-41c1-4978-a529-df566ebee74b","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2014 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"坂井, 靖文"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"柴崎, 崇之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"壇上, 匠"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山口, 久勝"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"森, 俊彦"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小柳, 洋一"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"田村, 泰孝"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yasufumi, Sakai","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takayuki, Shibasaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takumi, Danjo","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hisakatsu, Yamaguchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Toshihiko, Mori","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoichi, Koyanagi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hirotaka, Tamura","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"データセンターに絶えず求められる計算能力向上への要求を満たすために，サーバ内やサーバ間のチップ間有線通信では 50Gbps 以上のデータレートが求められている (例:OIF CEI-56G-VSR)．本稿では，baud-rate クロックリカバリーを行う 56Gbps データ受信器フロントエンドについて述べる．データ判定用と位相判定用のコンパレータを共有して受信器フロントエンド・に使用するコンパレータの数を最小化し，消費電力を低減した．受信器フロントエンドには連続時間リニアイコライザ (CTLE) と1-tap speculative 判定帰還型等化器を用いた．作成した受信器は，データレート 56Gbps 動作時にピットエラーレート10-12 でタイミングマージン 0.4UI を実現した．また，電源電圧 0.9Ｖ で消費電力 177mW，占有面積 0.27mm2 を実現した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"To meet ever-increasing demands for computing power in data centers, data rates over 50Gbps/signal (e.g., OIF CEI-56G-VSR)will eventually be required in wireline chip-to-chip communications within and between servers. This paper shows a 56-Gb/s receiver front-end suited for baud-rate clock recovery. Sharing the comparators for the data decision and phase detection minimizes the number of comparators in the front-end and reduces the power consumption. The front-end has a continuous-time linear equalizer followed by a 1-tap speculative decision-feedback equalizer. The front-end operates at 56Gb/s with a bit error rate of less than 10-12 with a 0.4UI margin in the bathtub curve. It occupies 0.27mm2 and consumes 177mW of power from a 0.9-V supply.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2014-11-19","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"38","bibliographicVolumeNumber":"2014-SLDM-168"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":107137,"updated":"2025-01-21T09:10:14.942665+00:00","links":{},"created":"2025-01-18T23:50:22.608970+00:00"}