{"id":107114,"updated":"2025-01-21T09:09:29.348554+00:00","links":{},"created":"2025-01-18T23:50:21.454641+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00107114","sets":["1164:2036:7423:7746"]},"path":["7746"],"owner":"11","recid":"107114","title":["HDRアーキテクチャを対象とした製造ばらつき耐性と低レイテンシを両立可能なマルチシナリオ高位合成手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2014-11-19"},"_buckets":{"deposit":"ef595f99-99ec-4b0c-aacc-ef6d68f5fc35"},"_deposit":{"id":"107114","pid":{"type":"depid","value":"107114","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"HDRアーキテクチャを対象とした製造ばらつき耐性と低レイテンシを両立可能なマルチシナリオ高位合成手法","author_link":["15582","15580","15583","15577","15579","15581","15578","15584"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"HDRアーキテクチャを対象とした製造ばらつき耐性と低レイテンシを両立可能なマルチシナリオ高位合成手法"},{"subitem_title":"A Process-Variation-Tolerant and Low-Latency Multi-Scenario High-Level Synthesis Algorithm for HDR Architectures","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"タイミング設計手法","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2014-11-19","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科電子光システム学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Electronic and Photonic Systems, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/107114/files/IPSJ-SLDM14168015.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM14168015.pdf","filesize":[{"value":"686.2 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"2f6fc638-8f7f-4aad-bed9-127648a5a334","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2014 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"井川, 昂輝"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"阿部, 晋矢"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"柳澤, 政生"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"戸川, 望"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Koki, Igawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shinya, Abe","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masao, Yanagisawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nozomu, Togawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"半導体プロセスの継続的な微細化により，製造ばらつきや配線遅延が LSI 設計に与える影響が増加している．これらに対し，製造ばらつきに応じて LSI 動作に複数のシナリオを想定し，しかも配線遅延を考慮した高位合成手法の構築が有力な解となる．本稿では，分散レジスタアーキテクチャモデルの 1 つとして HDR アーキテクチャを対象に，製造ばらつき耐性と低レイテンシを両立するマルチシナリオ高位合成手法を提案する．提案手法では使用するすべての演算器の遅延が Typical ケースの場合，Worst ケースの場合の 2 つのシナリオを想定し，これらのシナリオを同時に LSI 上に高位合成する．HDR アーキテクチャを前提にハドルによるモジュールの抽象化により，レイアウトに起因する問題の複雑度を軽減し，Typical シナリオと Worst シナリオで可能な限り共通化したスケジューリング／バインディングを実行することで 2 つのシナリオを同時に最適化する．計算機実験により，従来手法と比較し Typical シナリオのレイテンシを平均 33％，最大 39％削減できることを確認した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this paper, we propose a process-variation-tolerant and low-latency multi-scenario high-level synthesis algorithm for HDR architectures. We assume two scenarios, which are a typical-case scenario and a worst-case scenario, and realize them on a single chip. By using distributed-register architectures called HDR architectures, we can take into account interconnection delays in high-level syntesis. We first schedule/bind each of the scenarios independently. After that, we commonize a typical-case scenario and a worst-case scenario and synthesize a commonized scheduling/binding result. Experimental results show that our algorithm reduces the latency of typical-case scenario by up to 33% compared with previous methods.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2014-11-19","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"15","bibliographicVolumeNumber":"2014-SLDM-168"}]},"relation_version_is_last":true,"weko_creator_id":"11"}}