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From FLOPS to BYTES: Disruptive Change towards the Post-Moore Era (Unrefereed Workshop Manuscript) From FLOPS to BYTES: Disruptive Change towards the Post-Moore Era (Unrefereed Workshop Manuscript) Satoshi, Matsuoka Hideharu, Amano Kengo, Nakajima Koji, Inoue Tomohiro, Kudoh Naoya, Maruyama Kenjiro, Taura Takeshi, Iwashita Takahiro, Katagiri Toshihiro, Hanawa Toshio, Endo Satoshi, Matsuoka Hideharu, Amano Kengo, Nakajima Koji, Inoue Tomohiro, Kudoh Naoya, Maruyama Kenjiro, Taura Takeshi, Iwashita Takahiro, Katagiri Toshihiro, Hanawa Toshio, Endo HPC一般 Slowdown and inevitable end in exponential scaling of processor performance, the end of the so-called “Moore's Law”is predicted to occur around 2025-2030 timeframe. Because CMOS semiconductor voltage is also approaching its limits, this means that logic transistor power will become constant, and as a result, the system FLOPS will cease to improve, resulting in serious consequences for IT in general, especially supercomputing. Existing attempts to overcome the end of Moore 's law are rather limited in their future outlook or applicability. We claim that data-oriented parameters, such as bandwidth and capacity, or BYTES, are the new parameters that will allow continued performance gains for periods even after computing performance or FLOPS ceases to improve, due to continued advances in storage device technologies and optics, and manufacturing technologies including 3-D packaging. Such transition from FLOPS to BYTES will lead to disruptive changes in the overall systems from applications, algorithms, software to architecture, as to what parameter to optimize for, in order to achieve continued performance growth over time. We are launching a new set of research efforts to investigate and devise new technologies to enable such disruptive changes from FLOPS to BYTES in the Post-Moore era, focusing on HPC, where there is extreme sensitivity to performance, and expect the results to disseminate to the rest of IT. Slowdown and inevitable end in exponential scaling of processor performance, the end of the so-called “Moore's Law”is predicted to occur around 2025-2030 timeframe. Because CMOS semiconductor voltage is also approaching its limits, this means that logic transistor power will become constant, and as a result, the system FLOPS will cease to improve, resulting in serious consequences for IT in general, especially supercomputing. Existing attempts to overcome the end of Moore 's law are rather limited in their future outlook or applicability. We claim that data-oriented parameters, such as bandwidth and capacity, or BYTES, are the new parameters that will allow continued performance gains for periods even after computing performance or FLOPS ceases to improve, due to continued advances in storage device technologies and optics, and manufacturing technologies including 3-D packaging. Such transition from FLOPS to BYTES will lead to disruptive changes in the overall systems from applications, algorithms, software to architecture, as to what parameter to optimize for, in order to achieve continued performance growth over time. We are launching a new set of research efforts to investigate and devise new technologies to enable such disruptive changes from FLOPS to BYTES in the Post-Moore era, focusing on HPC, where there is extreme sensitivity to performance, and expect the results to disseminate to the rest of IT. 情報処理学会 2016-08-01 eng technical report https://ipsj.ixsq.nii.ac.jp/records/174146 2188-8841 AN10463942 研究報告ハイパフォーマンスコンピューティング（HPC） 2016-HPC-155 32 1 14 https://ipsj.ixsq.nii.ac.jp/record/174146/files/IPSJ-HPC16155032.pdf application/pdf 2.3 MB 2018-08-01