<?xml version='1.0' encoding='UTF-8'?>
<OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd">
  <responseDate>2026-05-20T20:33:35Z</responseDate>
  <request verb="GetRecord" metadataPrefix="jpcoar_1.0" identifier="oai:ipsj.ixsq.nii.ac.jp:00018518">https://ipsj.ixsq.nii.ac.jp/oai</request>
  <GetRecord>
    <record>
      <header>
        <identifier>oai:ipsj.ixsq.nii.ac.jp:00018518</identifier>
        <datestamp>2025-01-22T22:42:23Z</datestamp>
        <setSpec>934:1119:1142:1146</setSpec>
      </header>
      <metadata>
        <jpcoar:jpcoar xmlns:datacite="https://schema.datacite.org/meta/kernel-4/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:dcndl="http://ndl.go.jp/dcndl/terms/" xmlns:dcterms="http://purl.org/dc/terms/" xmlns:jpcoar="https://github.com/JPCOAR/schema/blob/master/1.0/" xmlns:oaire="http://namespace.openaire.eu/schema/oaire/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:rioxxterms="http://www.rioxx.net/schema/v2.0/rioxxterms/" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns="https://github.com/JPCOAR/schema/blob/master/1.0/" xsi:schemaLocation="https://github.com/JPCOAR/schema/blob/master/1.0/jpcoar_scm.xsd">
          <dc:title>パイプラインステージ統合によるプロセッサの消費エネルギーの削減</dc:title>
          <dc:title xml:lang="en">Reducing Processor Energy Consumption with Pipeline Stage Unification</dc:title>
          <jpcoar:creator>
            <jpcoar:creatorName>嶋田, 創</jpcoar:creatorName>
            <jpcoar:creatorName>安藤, 秀樹</jpcoar:creatorName>
            <jpcoar:creatorName>島田, 俊夫</jpcoar:creatorName>
          </jpcoar:creator>
          <jpcoar:creator>
            <jpcoar:creatorName xml:lang="en">Hajime, Shimada</jpcoar:creatorName>
            <jpcoar:creatorName xml:lang="en">Hideki, Ando</jpcoar:creatorName>
            <jpcoar:creatorName xml:lang="en">Toshio, Shimada</jpcoar:creatorName>
          </jpcoar:creator>
          <jpcoar:subject subjectScheme="Other">プロセッサアーキテクチャ</jpcoar:subject>
          <datacite:description descriptionType="Other">近年のモバイルプロセッサにおいては，低消費エネルギーと高性能の両立が求められている．これらの要求に応えるため，現在では，DVS（dynamic voltage scaling）と呼ばれる方式が導入されている．DVSは，低クロック周波数での動作時に，電源電圧を低下させ，消費エネルギーを削減する．DVSは現在では有効な方式であるが，将来のプロセス技術においては，電源電圧の可変範囲が縮小し，有効性が低下する．これに対して我々は，低クロック周波数での動作時に，電源電圧を最大値に保ったまま複数のパイプラインステージを統合するパイプラインステージ統合（PSU:pipeline stageunification）と呼ぶ方式を提案する．現在および将来のプロセス世代におけるDVSとPSUの効果を比較した結果，現在において，PSUはDVSに対して11?14%程度消費エネルギーを削減できることが分かった．さらに，将来ではDVS は大幅にその効果を落とすのに対し，PSU はその効果を維持し，その結果，約10年後にはPSUはDVSに対して27?34%と大きく消費エネルギーを削減できることが分かった．</datacite:description>
          <datacite:description descriptionType="Other">Recent mobile processors are required to exhibit low-energy consumption as well as high performance. To satisfy these requirements, a method called dynamic voltage scaling or DVS is currently employed. DVS reduces energy consumption by decreasing the supply voltage when a processor runs at a low clock frequency. Although DVS is an effective method for reducing energy consumption, its effectiveness will be limited in future process generations because the variable supply voltage range will become small. As an alternative, we propose a method called pipeline stage unification or PSU, which unifies multiple pipeline stages when the processor runs at a low clock frequency, leaving the supply voltage at its maximum level. We compared PSU to DVS in terms of their effectiveness in current and future process generations. Our evaluations show that currently PSU reduces energy consumption only moderately (11-14%) more than DVS. Furthermore, in the future, DVS will significantly decrease its effectiveness, whereas PSU will maintain its effectiveness. As a result, PSU will reduce energy consumption by 27-34% more than DVS after about 10 years.</datacite:description>
          <dc:publisher xml:lang="ja">情報処理学会</dc:publisher>
          <datacite:date dateType="Issued">2004-01-15</datacite:date>
          <dc:language>jpn</dc:language>
          <dc:type rdf:resource="http://purl.org/coar/resource_type/c_6501">journal article</dc:type>
          <jpcoar:identifier identifierType="URI">https://ipsj.ixsq.nii.ac.jp/records/18518</jpcoar:identifier>
          <jpcoar:sourceIdentifier identifierType="ISSN">1882-7829</jpcoar:sourceIdentifier>
          <jpcoar:sourceIdentifier identifierType="NCID">AA11833852</jpcoar:sourceIdentifier>
          <jpcoar:sourceTitle>情報処理学会論文誌コンピューティングシステム（ACS）</jpcoar:sourceTitle>
          <jpcoar:volume>45</jpcoar:volume>
          <jpcoar:issue>SIG01(ACS4)</jpcoar:issue>
          <jpcoar:pageStart>18</jpcoar:pageStart>
          <jpcoar:pageEnd>30</jpcoar:pageEnd>
          <jpcoar:file>
            <jpcoar:URI>https://ipsj.ixsq.nii.ac.jp/record/18518/files/IPSJ-TACS4501004.pdf</jpcoar:URI>
            <jpcoar:mimeType>application/pdf</jpcoar:mimeType>
            <jpcoar:extent>227.6 kB</jpcoar:extent>
            <datacite:date dateType="Available">2006-01-15</datacite:date>
          </jpcoar:file>
        </jpcoar:jpcoar>
      </metadata>
    </record>
  </GetRecord>
</OAI-PMH>
