Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays

• Item type: Journal(1)
• 公開日: 2014-03-15
• タイトル: Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays
• タイトル / 言語: en
• タイトル: Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: [一般論文(推薦論文, 特選論文)] physical unclonable function (PUF), arbiter PUF, pseudo-LFSR PUF (PL-PUF), SASEBO-GIII, Kintex-7, Artix-7, performance evaluation
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_6501
• 資源タイプ: journal article
• 著者所属: National Institute of Advanced Industrial Science and Technology (AIST)
• 著者所属: Tokyo University of Science
• 著者所属: National Institute of Advanced Industrial Science and Technology (AIST)
• 著者所属: The University of Electro-Communications
• 著者所属: National Institute of Advanced Industrial Science and Technology (AIST) / Toshiba Corporation
• 著者所属: National Institute of Advanced Industrial Science and Technology (AIST)
• 著者所属(英): en
• 著者所属(英): National Institute of Advanced Industrial Science and Technology (AIST)
• 著者所属(英): en
• 著者所属(英): Tokyo University of Science
• 著者所属(英): en
• 著者所属(英): National Institute of Advanced Industrial Science and Technology (AIST)
• 著者所属(英): en
• 著者所属(英): The University of Electro-Communications
• 著者所属(英): en
• 著者所属(英): National Institute of Advanced Industrial Science and Technology (AIST) / Toshiba Corporation
• 著者所属(英): en
• 著者所属(英): National Institute of Advanced Industrial Science and Technology (AIST)
• 著者名: Yohei, Hori; Hyunho, Kang; Toshihiro, Katashita; Akashi, Satoh; Shinichi, Kawamura; Kazukuni, Kobara
• 著者名(英): Yohei, Hori; Hyunho, Kang; Toshihiro, Katashita; Akashi, Satoh; Shinichi, Kawamura; Kazukuni, Kobara
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: In this study, the properties of physical unclonable functions (PUFs) for 28-nm process field-programmable gate arrays (FPGAs) are examined. A PUF is a circuit that generates device-specific IDs by extracting device variations. Owing to device variation, no two PUFs will generate the same ID even if they have identical structures and are manufactured on the same silicon wafer. However, because the influence of device variation increases as the size of the process node shrinks, it is uncertain whether PUFs can be built using recently developed small-scale process nodes, even though the technology of variation control is constantly advancing. While many PUFs using 40-nm or larger process nodes have been reported, smaller devices have not yet been studied to the authors' knowledge, and this is the first published journal article on PUFs for 28-nm process FPGAs. In this paper, within-die reproducibility, die-to-die uniqueness, and other properties are evaluated, and the feasibility of PUFs on 28-nm FPGAs is discussed.; ------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.22(2014) No.2 (online); DOI http://dx.doi.org/10.2197/ipsjjip.22.344; ------------------------------
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: In this study, the properties of physical unclonable functions (PUFs) for 28-nm process field-programmable gate arrays (FPGAs) are examined. A PUF is a circuit that generates device-specific IDs by extracting device variations. Owing to device variation, no two PUFs will generate the same ID even if they have identical structures and are manufactured on the same silicon wafer. However, because the influence of device variation increases as the size of the process node shrinks, it is uncertain whether PUFs can be built using recently developed small-scale process nodes, even though the technology of variation control is constantly advancing. While many PUFs using 40-nm or larger process nodes have been reported, smaller devices have not yet been studied to the authors' knowledge, and this is the first published journal article on PUFs for 28-nm process FPGAs. In this paper, within-die reproducibility, die-to-die uniqueness, and other properties are evaluated, and the feasibility of PUFs on 28-nm FPGAs is discussed.; ------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.22(2014) No.2 (online); DOI http://dx.doi.org/10.2197/ipsjjip.22.344; ------------------------------
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN00116647
• 書誌情報: 情報処理学会論文誌; 巻 55, 号 3, 発行日 2014-03-15
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 1882-7764