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A High Parallelism LDPC Decoder with an Early Stopping Criterion for WiMax and WiFi Application
https://ipsj.ixsq.nii.ac.jp/records/70263
https://ipsj.ixsq.nii.ac.jp/records/70263b00a2133-236a-429b-a404-7bc4c014ce5b
名前 / ファイル | ライセンス | アクション |
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Copyright (c) 2010 by the Information Processing Society of Japan
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オープンアクセス |
Item type | Trans(1) | |||||||
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公開日 | 2010-08-16 | |||||||
タイトル | ||||||||
タイトル | A High Parallelism LDPC Decoder with an Early Stopping Criterion for WiMax and WiFi Application | |||||||
タイトル | ||||||||
言語 | en | |||||||
タイトル | A High Parallelism LDPC Decoder with an Early Stopping Criterion for WiMax and WiFi Application | |||||||
言語 | ||||||||
言語 | eng | |||||||
キーワード | ||||||||
主題Scheme | Other | |||||||
主題 | Architectural Design | |||||||
資源タイプ | ||||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||||
資源タイプ | journal article | |||||||
著者所属 | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属 | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属 | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属 | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属 | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属(英) | ||||||||
en | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属(英) | ||||||||
en | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属(英) | ||||||||
en | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属(英) | ||||||||
en | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者所属(英) | ||||||||
en | ||||||||
School of Information, Production and Systems, Waseda University | ||||||||
著者名 |
Zhixiang, Chen
× Zhixiang, Chen
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著者名(英) |
Zhixiang, Chen
× Zhixiang, Chen
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論文抄録 | ||||||||
内容記述タイプ | Other | |||||||
内容記述 | In this paper we propose a synthesizable LDPC decoder IP core for WiMax and WiFi applications. Two new techniques are applied in the proposed decoder to improve the decoding performance. Firstly, a high parallelism permutation network (PN) is proposed to perform the circulant shift according to the parity check matrix (PCM) defined in WiMax and WiFi standards. By using the proposed PN, at most, four independent code frames with small code length are decoded concurrently, which largely improves the decoding throughput (2-4 times). Secondly, a fast early stopping criterion specialized for WiMax and WiFi LDPC code is proposed to reduce the average iteration number. Unlike the early works, by utilizing our proposed stopping criterion, the decoding will be stopped when all the information bits of a code frame are corrected even if there are still some errors in redundant part. Experiment results show that, it can reduce up to 20% iteration numbers compared to popular used stopping criterion. | |||||||
論文抄録(英) | ||||||||
内容記述タイプ | Other | |||||||
内容記述 | In this paper we propose a synthesizable LDPC decoder IP core for WiMax and WiFi applications. Two new techniques are applied in the proposed decoder to improve the decoding performance. Firstly, a high parallelism permutation network (PN) is proposed to perform the circulant shift according to the parity check matrix (PCM) defined in WiMax and WiFi standards. By using the proposed PN, at most, four independent code frames with small code length are decoded concurrently, which largely improves the decoding throughput (2-4 times). Secondly, a fast early stopping criterion specialized for WiMax and WiFi LDPC code is proposed to reduce the average iteration number. Unlike the early works, by utilizing our proposed stopping criterion, the decoding will be stopped when all the information bits of a code frame are corrected even if there are still some errors in redundant part. Experiment results show that, it can reduce up to 20% iteration numbers compared to popular used stopping criterion. | |||||||
書誌レコードID | ||||||||
収録物識別子タイプ | NCID | |||||||
収録物識別子 | AA12394951 | |||||||
書誌情報 |
IPSJ Transactions on System LSI Design Methodology(TSLDM) 巻 3, p. 292-302, 発行日 2010-08-16 |
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ISSN | ||||||||
収録物識別子タイプ | ISSN | |||||||
収録物識別子 | 1882-6687 | |||||||
出版者 | ||||||||
言語 | ja | |||||||
出版者 | 情報処理学会 |