AReconfigurable Functional Unit for Adaptable Custom Instructions

• Item type: SIG Technical Reports(1)
• 公開日: 2006-06-09
• タイトル: AReconfigurable Functional Unit for Adaptable Custom Instructions
• タイトル / 言語: en
• タイトル: AReconfigurable Functional Unit for Adaptable Custom Instructions
• 言語: eng
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_18gh
• 資源タイプ: technical report
• 著者所属: Department of Informatics Graduate School of Information Science and Electrical Engineering Kyushu University
• 著者所属: Computer Engineering and Information Technology Department Amirkabir University of Technology
• 著者所属: Department of Informatics Graduate School of
• 著者所属(英): en
• 著者所属(英): Department of Informatics, Graduate School of Information Science and Electrical Engineering, Kyushu University
• 著者所属(英): en
• 著者所属(英): Computer Engineering and Information Technology Department, Amirkabir University of Technology,
• 著者所属(英): en
• 著者所属(英): Department of Informatics, Graduate School of Information Science and Electrical Engineering, Kyushu University
• 著者所属(英): en
• 著者所属(英): Department of Informatics, Graduate School of Information Science and Electrical Engineering, Kyushu University
• 著者所属(英): en
• 著者所属(英): Computer Engineering and Information Technology Department, Amirkabir University of Technology
• 著者名: DepartmentofInformaticsGraduateSchoolofInformationScienceandElectricalEngineeringKyushuUniversity; ComputerEngineeringandInformationTechnologyDepartmentAmirkabirUniversityofTechnology; DepartmentofInformaticsGraduateSchoolof
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target applications after chip-fabrication which brings about more flexibility. The custom instructions (CIs) are generated deploying the hot basic blocks during the training mode. In the normal mode CIs are executed on the RFU. A quantitative approach was used for designing the RFU. The RFU is a matrix of functional units with 8 inputs and 6 outputs. Performance is enhanced up to 1.5 using the proposed RFU for 22 applications of Mibench. The size of configuration memory has been reduced by 40% through making the RFU partially reconfigurable finding subsets of CIs and merging small CIs into one configuration. This processor needs no extra opcodes for CIs new compiler source code modification and recompilation.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target applications, after chip-fabrication, which brings about more flexibility. The custom instructions (CIs) are generated deploying the hot basic blocks during the training mode. In the normal mode, CIs are executed on the RFU. A quantitative approach was used for designing the RFU. The RFU is a matrix of functional units with 8 inputs and 6 outputs. Performance is enhanced up to 1.5 using the proposed RFU for 22 applications of Mibench. The size of configuration memory has been reduced by 40% through making the RFU partially reconfigurable, finding subsets of CIs and merging small CIs into one configuration. This processor needs no extra opcodes for CIs, new compiler, source code modification and recompilation.
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN10096105
• 書誌情報: 情報処理学会研究報告計算機アーキテクチャ（ARC）; 巻 2006, 号 62(2006-ARC-168), p. 69-74, 発行日 2006-06-09
• Notice: SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc.
• 出版者 / 言語: ja
• 出版者: 情報処理学会