A Software Implementation of Minimum Energy Point Tracking Algorithm for Microprocessors

• Item type: Symposium(1)
• 公開日: 2018-08-22
• タイトル: A Software Implementation of Minimum Energy Point Tracking Algorithm for Microprocessors
• タイトル / 言語: en
• タイトル: A Software Implementation of Minimum Energy Point Tracking Algorithm for Microprocessors
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: 低消費電力
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_5794
• 資源タイプ: conference paper
• 著者所属: Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属: Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属: Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属: Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
• 著者名: Shengyu, Liu; Jun, Shiomi; Tohru, Ishihara; Hidetoshi, Onodera
• 著者名(英): Shengyu, Liu; Jun, Shiomi; Tohru, Ishihara; Hidetoshi, Onodera
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: A minimum energy point (MEP) is defined as a pair of supply voltage (VDD) and threshold voltage (VTH) of a circuit, which minimizes the energy consumption of the circuit under a specific performance constraint. In this paper, a software implementation of an existing MEP tracking algorithm which minimizes the energy consumption of target devices at runtime under a wide process, voltage and temperature (PVT) condition is proposed. By exploiting monitor circuits integrated into a target processor, the proposed power management software autonomously optimizes VDD and VTH at runtime so that the processor can operate at MEPs even if MEPs dynamically shift due to a PVT fluctuation and change in the performance constraint. A 32-bit RISC processor chip fabricated with a 65-nm process technology demonstrates that the proposed MEP tracking system consisting of interface circuits mapped on an FPGA and the power management software running on a host computer can accurately track the MEP of the processor chip at runtime even if PVT conditions and performance constraint widely change.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: A minimum energy point (MEP) is defined as a pair of supply voltage (VDD) and threshold voltage (VTH) of a circuit, which minimizes the energy consumption of the circuit under a specific performance constraint. In this paper, a software implementation of an existing MEP tracking algorithm which minimizes the energy consumption of target devices at runtime under a wide process, voltage and temperature (PVT) condition is proposed. By exploiting monitor circuits integrated into a target processor, the proposed power management software autonomously optimizes VDD and VTH at runtime so that the processor can operate at MEPs even if MEPs dynamically shift due to a PVT fluctuation and change in the performance constraint. A 32-bit RISC processor chip fabricated with a 65-nm process technology demonstrates that the proposed MEP tracking system consisting of interface circuits mapped on an FPGA and the power management software running on a host computer can accurately track the MEP of the processor chip at runtime even if PVT conditions and performance constraint widely change.
• 書誌情報: DAシンポジウム2018論文集; 巻 2018, p. 166-171, 発行日 2018-08-22
• 出版者 / 言語: ja
• 出版者: 情報処理学会