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Performance Comparison of Synchronous and Asynchronous VLSI Systems
https://ipsj.ixsq.nii.ac.jp/records/130937
https://ipsj.ixsq.nii.ac.jp/records/130937a91fec8f-b734-4e13-96fa-826642381bc5
名前 / ファイル | ライセンス | アクション |
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Item type | National Convention(1) | |||||
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公開日 | 1997-03-12 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Performance Comparison of Synchronous and Asynchronous VLSI Systems | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
資源タイプ | conference paper | |||||
著者所属(英) | ||||||
en | ||||||
Research Center for Advanced Science and Technology, The University of Tokyo | ||||||
著者所属(英) | ||||||
en | ||||||
Research Center for Advanced Science and Technology, The University of Tokyo | ||||||
論文抄録(英) | ||||||
内容記述タイプ | Other | |||||
内容記述 | Scaling integrated circuit (IC) dimensions has significant impact on the performance of VLSI systems. Although switching performance and power consumption can be improved, interconnection delays are becoming more dominant in future technologies. It is necessary to suppress the performance degradation due to the increased interconnection delays in scaled technologies. Scaling the interconnection and the insulator thickness by factors smaller than the scaling factor, using multilayer interconnections, and dividing wires by means of repeaters are the mainly used methods . Due to its average-case behavior and nonexistence of clock skew, asynchronous systems are suggested as an alternative for current synchronous systems. This paper analyses the clock skew in synchronous systems and the averagecase behavior of asynchronous systems in detail. Based on this analysis, comparison of synchronous and asynchronous systems is made for different technology generations. | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AN00349328 | |||||
書誌情報 |
全国大会講演論文集 巻 第54回, 号 アーキテクチャ, p. 87-88, 発行日 1997-03-12 |
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出版者 | ||||||
言語 | ja | |||||
出版者 | 情報処理学会 |