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Implementation of Parallel Volume Visualization on the VC-1
https://ipsj.ixsq.nii.ac.jp/records/123346
https://ipsj.ixsq.nii.ac.jp/records/123346763d08f3-2e8f-4f7b-a3a1-cba26f17b370
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
KJ00001337173.pdf (221.5 kB)
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| Item type | National Convention(1) | |||||
|---|---|---|---|---|---|---|
| 公開日 | 1993-03-01 | |||||
| タイトル | ||||||
| 言語 | en | |||||
| タイトル | Implementation of Parallel Volume Visualization on the VC-1 | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
| 資源タイプ | conference paper | |||||
| 著者所属(英) | ||||||
| en | ||||||
| the University of Tokyo | ||||||
| 著者所属(英) | ||||||
| en | ||||||
| Kubota Computer Inc. | ||||||
| 著者所属(英) | ||||||
| en | ||||||
| the University of Tokyo | ||||||
| 論文抄録(英) | ||||||
| 内容記述タイプ | Other | |||||
| 内容記述 | The deniand for faster image processing is increasing in such a way that it rnakes parailel processing necessary.there is a great variety of computer graphic aigoritlims which can be utilized in parailel processor environrnents. In this work, we use volume visuaiization aigorithrns, arid iniplement them on the VC-1,a loosely-coupled array of generai-purpose processors with a confiict-free niu'tiport frame buffer, being developed at the Kunii laboratory of the Computer Science Department, The University of Tokyo.Distribution of the tasks and the locaiity of the informations arnong the processors will be the rnain issue of this study, while at the sarne tirne we evaiuate the perforrnance of this new architecture. | |||||
| 書誌レコードID | ||||||
| 収録物識別子タイプ | NCID | |||||
| 収録物識別子 | AN00349328 | |||||
| 書誌情報 |
全国大会講演論文集 巻 第46回, 号 データ処理, p. 479-480, 発行日 1993-03-01 |
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| 出版者 | ||||||
| 言語 | ja | |||||
| 出版者 | 情報処理学会 | |||||
