2024-03-29T23:25:45Zhttps://ipsj.ixsq.nii.ac.jp/ej/?action=repository_oaipmhoai:ipsj.ixsq.nii.ac.jp:000238512024-03-29T05:26:34Z01164:01579:01639:01641
Register Spilling for Software PipeliningRegister Spilling for Software Pipeliningjpnhttp://id.nii.ac.jp/1001/00023851/Technical Reporthttps://ipsj.ixsq.nii.ac.jp/ej/?action=repository_action_common_download&item_id=23851&item_no=1&attribute_id=1&file_no=1Copyright (c) 1998 by the Information Processing Society of JapanDepartment of Intelligence and Computer Science Nagoya Institute of TechnologyEducational Center for information processing Nagoya Institute of TechnologyDepartment of Intelligence and Computer Science Nagoya Institute of TechnologyHuan, LiuDingchao, LiNaohiro, IshiiSoftware Pipelining is technique for exploiting instruction level parallelism in a variety of loops. In this paper we improve the existing register-constrained software pipelining algorithm for efficiently schdeuling a loop with recurrences. Our strategy is to avoid spilling lifetimes in recurrence paths during the scheduling process. This enables software pipelining to reduce the register requirement without increasing the initiation interval of the loop's successive iterations.Software Pipelining is technique for exploiting instruction level parallelism in a variety of loops. In this paper, we improve the existing register-constrained software pipelining algorithm for efficiently schdeuling a loop with recurrences. Our strategy is to avoid spilling lifetimes in recurrence paths during the scheduling process. This enables software pipelining to reduce the register requirement without increasing the initiation interval of the loop's successive iterations.AN10096105情報処理学会研究報告計算機アーキテクチャ(ARC)199870(1998-ARC-130)67721998-08-052009-06-30