@article{weko_81497_1,
   author	 = "Yohei,Nakata and Shunsuke,Okumura and Hiroshi,Kawaguchi and Masahiko,Yoshimoto",
   title	 = "0.5-V 4-MB Variation-Aware Cache Architecture Using 7T/14T SRAM and Its Testing Scheme",
   journal	 = "IPSJ Transactions on System LSI Design Methodology（TSLDM）",
   year 	 = "2012",
   volume	 = "5",
   number	 = "",
   pages	 = "32--43",
   month	 = "feb"
}